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/openbmc/linux/drivers/clk/renesas/
H A Drcar-gen3-cpg.c46 unsigned int fixed_mult; member
62 return parent_rate * mult * pll_clk->fixed_mult; in cpg_pll_clk_recalc_rate()
72 prate = req->best_parent_rate * pll_clk->fixed_mult; in cpg_pll_clk_determine_rate()
92 mult = DIV_ROUND_CLOSEST_ULL(rate, parent_rate * pll_clk->fixed_mult); in cpg_pll_clk_set_rate()
140 pll_clk->fixed_mult = mult; /* PLL refclk x (setting + 1) x mult */ in cpg_pll_clk_register()