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Searched refs:eps5 (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/include/sound/sof/
H A Dxtensa.h35 uint32_t eps5; member
/openbmc/linux/sound/soc/sof/xtensa/
H A Dcore.c109 xoops->eps2, xoops->eps3, xoops->eps4, xoops->eps5); in xtensa_dsp_oops()
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dgdb-config.c.inc174 XTREG(76, 304, 19, 4, 4, 0x02c5, 0x0007, -2, 2, 0x1000, eps5,
H A Dxtensa-modules.c.inc11330 { "rsr.eps5", 150 /* xt_iclass_rsr.eps5 */,
11333 { "wsr.eps5", 151 /* xt_iclass_wsr.eps5 */,
11336 { "xsr.eps5", 152 /* xt_iclass_xsr.eps5 */,
12402 return 194; /* xsr.eps5 */
12596 return 192; /* rsr.eps5 */
12733 return 193; /* wsr.eps5 */
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dgdb-config.c.inc86 XTREG( 62,248,19, 4, 4,0x02c5,0x0007,-2, 2,0x1000,eps5, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc9171 { "rsr.eps5", ICLASS_xt_iclass_rsr_eps5,
9174 { "wsr.eps5", ICLASS_xt_iclass_wsr_eps5,
9177 { "xsr.eps5", ICLASS_xt_iclass_xsr_eps5,
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dgdb-config.c.inc102 XTREG(77, 308, 19, 4, 4, 0x02c5, 0x0007, -2, 2, 0x1000, eps5, 0, 0, 0, 0, 0, 0)
H A Dxtensa-modules.c.inc11975 { "rsr.eps5", ICLASS_xt_iclass_rsr_eps5,
11978 { "wsr.eps5", ICLASS_xt_iclass_wsr_eps5,
11981 { "xsr.eps5", ICLASS_xt_iclass_xsr_eps5,
/openbmc/qemu/target/xtensa/core-de212/
H A Dgdb-config.c.inc95 XTREG( 71,284,19, 4, 4,0x02c5,0x0007,-2, 2,0x1000,eps5, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc11344 { "rsr.eps5", ICLASS_xt_iclass_rsr_eps5,
11347 { "wsr.eps5", ICLASS_xt_iclass_wsr_eps5,
11350 { "xsr.eps5", ICLASS_xt_iclass_xsr_eps5,
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dgdb-config.c.inc131 XTREG( 96,432,19, 4, 4,0x02c5,0x0007,-2, 2,0x1000,eps5, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc33488 { "rsr.eps5", ICLASS_xt_iclass_rsr_eps5,
33491 { "wsr.eps5", ICLASS_xt_iclass_wsr_eps5,
33494 { "xsr.eps5", ICLASS_xt_iclass_xsr_eps5,
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dgdb-config.c.inc135 XTREG( 96,448,19, 4, 4,0x02c5,0x0007,-2, 2,0x1000,eps5, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc16597 { "rsr.eps5", ICLASS_xt_iclass_rsr_eps5,
16600 { "wsr.eps5", ICLASS_xt_iclass_wsr_eps5,
16603 { "xsr.eps5", ICLASS_xt_iclass_xsr_eps5,
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dgdb-config.c.inc271 XTREG(192,1888,19, 4, 4,0x02c5,0x0007,-2, 2,0x1000,eps5, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc75872 { "rsr.eps5", ICLASS_xt_iclass_rsr_eps5,
75875 { "wsr.eps5", ICLASS_xt_iclass_wsr_eps5,
75878 { "xsr.eps5", ICLASS_xt_iclass_xsr_eps5,