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Searched refs:dqs_dly_set (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c412 u32 dqs_dly_set[MAX_PUP_NUM] = { 0 }; in ddr3_tx_shift_dqs_adll_step_before_fail() local
484 dqs_dly_set[pup] == 0) in ddr3_tx_shift_dqs_adll_step_before_fail()
485 dqs_dly_set[pup] = adll_val - 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
495 dqs_dly_set[pup] == 0) in ddr3_tx_shift_dqs_adll_step_before_fail()
496 dqs_dly_set[pup] = adll_val - 1; in ddr3_tx_shift_dqs_adll_step_before_fail()
506 dqs_dly_set[pup]); in ddr3_tx_shift_dqs_adll_step_before_fail()