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Searched refs:dcn3_01_soc (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c112 struct _vcs_dpi_soc_bounding_box_st dcn3_01_soc = { variable
333 memcpy(s, dcn3_01_soc.clock_limits, sizeof(dcn3_01_soc.clock_limits)); in dcn301_update_bw_bounding_box()
338 dcn3_01_soc.num_chans = bw_params->num_channels; in dcn301_update_bw_bounding_box()
359 dcn3_01_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; in dcn301_update_bw_bounding_box()
363 dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn301_update_bw_bounding_box()
368 dcn3_01_soc.num_states = clk_table->num_entries; in dcn301_update_bw_bounding_box()
370 s[dcn3_01_soc.num_states] = in dcn301_update_bw_bounding_box()
371 dcn3_01_soc.clock_limits[dcn3_01_soc.num_states - 1]; in dcn301_update_bw_bounding_box()
372 s[dcn3_01_soc.num_states].state = dcn3_01_soc.num_states; in dcn301_update_bw_bounding_box()
375 memcpy(dcn3_01_soc.clock_limits, s, sizeof(dcn3_01_soc.clock_limits)); in dcn301_update_bw_bounding_box()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_resource.h36 extern struct _vcs_dpi_soc_bounding_box_st dcn3_01_soc;
H A Ddcn301_resource.c1289 struct _vcs_dpi_soc_bounding_box_st *loaded_bb = &dcn3_01_soc; in init_soc_bounding_box()
1546 set_wm_ranges(pool->base.pp_smu, &dcn3_01_soc); in dcn301_resource_construct()
1557 dml_init_instance(&dc->dml, &dcn3_01_soc, &dcn3_01_ip, DML_PROJECT_DCN30); in dcn301_resource_construct()