Home
last modified time | relevance | path

Searched refs:ctl0_base (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1-pll.c71 void __iomem *ctl0_base; member
215 writel_relaxed(reg_ctl[0], pll->ctl0_base); in ma35d1_clk_pll_set_rate()
232 reg_ctl[0] = readl_relaxed(pll->ctl0_base); in ma35d1_clk_pll_recalc_rate()
239 reg_ctl[0] = readl_relaxed(pll->ctl0_base); in ma35d1_clk_pll_recalc_rate()
264 reg_ctl[0] = readl_relaxed(pll->ctl0_base); in ma35d1_clk_pll_round_rate()
271 reg_ctl[0] = readl_relaxed(pll->ctl0_base); in ma35d1_clk_pll_round_rate()
337 pll->ctl0_base = base + REG_PLL_CTL0_OFFSET; in ma35d1_reg_clk_pll()