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Searched refs:cpu2_csr (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dpsci.c47 writel((4 << CSR_WAIT_WFI_SHIFT) | CSR_ENABLE, &flow->cpu2_csr); in psci_board_init()
55 !(readl(&flow->cpu2_csr) & CSR_PWR_OFF_STS) || in psci_board_init()
/openbmc/u-boot/arch/arm/include/asm/arch-tegra30/
H A Dflow.h18 u32 cpu2_csr; member
/openbmc/u-boot/arch/arm/include/asm/arch-tegra114/
H A Dflow.h18 u32 cpu2_csr; member
/openbmc/u-boot/arch/arm/include/asm/arch-tegra210/
H A Dflow.h19 u32 cpu2_csr; /* offset 0x20 */ member
/openbmc/u-boot/arch/arm/include/asm/arch-tegra124/
H A Dflow.h19 u32 cpu2_csr; /* offset 0x20 */ member