Searched refs:cfgBIFPLR5_CACHE_LINE (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/ | ||
H A D | nbio_7_7_0_offset.h | 3082 #define cfgBIFPLR5_CACHE_LINE … macro |
H A D | nbio_7_2_0_offset.h | 3468 #define cfgBIFPLR5_CACHE_LINE … macro |