Searched refs:base_drexi1 (Results 1 – 1 of 1) sorted by relevance
157 void __iomem *base_drexi1; member392 dmc->base_drexi1 + EXYNOS5_DREXI_TIMINGROW1); in exynos5_set_bypass_dram_timings()396 dmc->base_drexi1 + EXYNOS5_DREXI_TIMINGDATA1); in exynos5_set_bypass_dram_timings()400 dmc->base_drexi1 + EXYNOS5_DREXI_TIMINGPOWER1); in exynos5_set_bypass_dram_timings()432 dmc->base_drexi1 + EXYNOS5_DREXI_TIMINGROW0); in exynos5_dram_change_timings()436 dmc->base_drexi1 + EXYNOS5_DREXI_TIMINGDATA0); in exynos5_dram_change_timings()849 writel(0, dmc->base_drexi1 + DREX_PMNC_PPC); in exynos5_dmc_perf_events_check()858 val = readl(dmc->base_drexi1 + DREX_FLAG_PPC); in exynos5_dmc_perf_events_check()906 writel(0, dmc->base_drexi1 + DREX_PMNC_PPC); in exynos5_dmc_disable_perf_events()1442 if (IS_ERR(dmc->base_drexi1)) in exynos5_dmc_probe()[all …]