Searched refs:axi_clkgen (Results 1 – 2 of 2) sorted by relevance
56 struct axi_clkgen { struct231 static void axi_clkgen_write(struct axi_clkgen *axi_clkgen, in axi_clkgen_write() argument237 static void axi_clkgen_read(struct axi_clkgen *axi_clkgen, in axi_clkgen_read() argument258 static int axi_clkgen_mmcm_read(struct axi_clkgen *axi_clkgen, in axi_clkgen_mmcm_read() argument282 static int axi_clkgen_mmcm_write(struct axi_clkgen *axi_clkgen, in axi_clkgen_mmcm_write() argument320 static void axi_clkgen_set_div(struct axi_clkgen *axi_clkgen, in axi_clkgen_set_div() argument339 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_set_rate() local390 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(hw); in axi_clkgen_determine_rate() local438 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_recalc_rate() local465 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_enable() local[all …]
14 The axi_clkgen IP core is a software programmable clock generator,17 Link: https://wiki.analog.com/resources/fpga/docs/axi_clkgen