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Searched refs:aon_clk (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-sprd.txt27 clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
28 <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
29 <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
30 <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
31 assigned-clocks = <&aon_clk CLK_PWM0>,
32 <&aon_clk CLK_PWM1>,
33 <&aon_clk CLK_PWM2>,
34 <&aon_clk CLK_PWM3>;
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dums512.dtsi431 aon_clk: clock-controller@32080000 { label
686 clocks = <&ext_26m>, <&aon_clk CLK_CSSYS>, <&pll2 CLK_TWPLL_512M>;
703 clocks = <&ext_26m>, <&aon_clk CLK_CSSYS>, <&pll2 CLK_TWPLL_512M>;
720 clocks = <&ext_26m>, <&aon_clk CLK_CSSYS>, <&pll2 CLK_TWPLL_512M>;
737 clocks = <&ext_26m>, <&aon_clk CLK_CSSYS>, <&pll2 CLK_TWPLL_512M>;
754 clocks = <&ext_26m>, <&aon_clk CLK_CSSYS>, <&pll2 CLK_TWPLL_512M>;
771 clocks = <&ext_26m>, <&aon_clk CLK_CSSYS>, <&pll2 CLK_TWPLL_512M>;
788 clocks = <&ext_26m>, <&aon_clk CLK_CSSYS>, <&pll2 CLK_TWPLL_512M>;
805 clocks = <&ext_26m>, <&aon_clk CLK_CSSYS>, <&pll2 CLK_TWPLL_512M>;
H A Dsc9863a.dtsi171 aon_clk: clock-controller@402d0000 { label
560 clocks = <&aon_clk CLK_SDIO0_2X>,
562 assigned-clocks = <&aon_clk CLK_SDIO0_2X>;
576 clocks = <&aon_clk CLK_EMMC_2X>,
578 assigned-clocks = <&aon_clk CLK_EMMC_2X>;
/openbmc/linux/drivers/mtd/nand/raw/
H A Dqcom_nandc.c398 struct clk *aon_clk; member
3398 nandc->aon_clk = devm_clk_get(dev, "aon"); in qcom_nandc_probe()
3399 if (IS_ERR(nandc->aon_clk)) in qcom_nandc_probe()
3400 return PTR_ERR(nandc->aon_clk); in qcom_nandc_probe()
3421 ret = clk_prepare_enable(nandc->aon_clk); in qcom_nandc_probe()
3442 clk_disable_unprepare(nandc->aon_clk); in qcom_nandc_probe()
3468 clk_disable_unprepare(nandc->aon_clk); in qcom_nandc_remove()