Home
last modified time | relevance | path

Searched refs:addrlo (Results 1 – 16 of 16) sorted by relevance

/openbmc/u-boot/cmd/
H A Dmdio.c43 int addrlo, in mdio_write_ranges() argument
51 for (addr = addrlo; addr <= addrhi; addr++) { in mdio_write_ranges()
72 int addrlo, in mdio_read_ranges() argument
79 for (addr = addrlo; addr <= addrhi; addr++) { in mdio_read_ranges()
141 int *addrlo, int *addrhi) in extract_phy_range() argument
172 *addrlo = *addrhi = dev->addr; in extract_phy_range()
201 addrlo = last_addr_lo; in do_mdio()
220 addrlo = phydev->addr; in do_mdio()
221 addrhi = addrlo; in do_mdio()
250 &phydev, &addrlo, &addrhi)) in do_mdio()
[all …]
H A Dmii.c273 unsigned char addrlo, addrhi, reglo, reghi; in do_mii() local
292 addrlo = last_addr_lo; in do_mii()
307 extract_range(argv[2], &addrlo, &addrhi); in do_mii()
337 start = addrlo; end = addrhi; in do_mii()
358 for (addr = addrlo; addr <= addrhi; addr++) { in do_mii()
367 if ((addrlo != addrhi) || (reglo != reghi)) in do_mii()
373 if ((addrlo != addrhi) && (reglo != reghi)) in do_mii()
377 for (addr = addrlo; addr <= addrhi; addr++) { in do_mii()
387 for (addr = addrlo; addr <= addrhi; addr++) { in do_mii()
417 for (addr = addrlo; addr <= addrhi; addr++) { in do_mii()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fault/
H A Dgv100.c47 const u32 addrlo = nvkm_ro32(mem, base + 0x08); in gv100_fault_buffer_process() local
59 info.addr = ((u64)addrhi << 32) | addrlo; in gv100_fault_buffer_process()
134 const u32 addrlo = nvkm_rd32(device, 0x100e4c); in gv100_fault_intr_fault() local
140 info.addr = ((u64)addrhi << 32) | addrlo; in gv100_fault_intr_fault()
H A Dtu102.c91 const u32 addrlo = nvkm_rd32(device, 0xb83080); in tu102_fault_info_fault() local
97 info.addr = ((u64)addrhi << 32) | addrlo; in tu102_fault_info_fault()
/openbmc/linux/drivers/net/wireless/broadcom/b43/
H A Ddma.c185 u32 addrlo, addrhi; in op64_fill_descriptor() local
191 addrlo = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW); in op64_fill_descriptor()
209 desc->dma64.address_low = cpu_to_le32(addrlo); in op64_fill_descriptor()
678 u32 addrlo; in dmacontroller_setup() local
685 addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW); in dmacontroller_setup()
694 b43_dma_write(ring, B43_DMA64_TXRINGLO, addrlo); in dmacontroller_setup()
699 addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW); in dmacontroller_setup()
707 b43_dma_write(ring, B43_DMA32_TXRING, addrlo); in dmacontroller_setup()
716 addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW); in dmacontroller_setup()
726 b43_dma_write(ring, B43_DMA64_RXRINGLO, addrlo); in dmacontroller_setup()
[all …]
/openbmc/linux/drivers/net/hippi/
H A Drrunner.h492 u64 addrlo; member
495 u32 addrlo;
504 ra->addrlo = baddr; in set_rraddr()
507 ra->addrlo = baddr; in set_rraddr()
H A Drrunner.c709 rrpriv->rx_ring[i].addr.addrlo, in rr_init1()
963 desc->addr.addrlo, in rx_int()
971 desc->addr.addrlo, in rx_int()
984 desc->addr.addrlo, in rx_int()
1079 desc->addr.addrlo, skb->len, in rr_interrupt()
1121 desc->addr.addrlo, skb->len, in rr_raz_tx()
1144 desc->addr.addrlo, in rr_raz_rx()
1308 (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo, in rr_dump()
1324 (unsigned long long) rrpriv->tx_ring[i].addr.addrlo); in rr_dump()
/openbmc/linux/drivers/net/ethernet/freescale/fs_enet/
H A Dmac-fec.c234 u32 addrhi, addrlo; in restart() local
249 addrlo = ((u32) dev->dev_addr[4] << 24) | in restart()
252 FW(fecp, addr_high, addrlo); in restart()
/openbmc/qemu/tcg/mips/
H A Dtcg-target.c.inc1237 ldst->addrlo_reg = addrlo;
1246 tcg_out_opc_sa(s, OPC_SRL, TCG_TMP3, addrlo,
1249 tcg_out_dsrl(s, TCG_TMP3, addrlo,
1280 TCG_TMP2, addrlo, s_mask - a_mask);
1288 tcg_out_ext32u(s, TCG_TMP2, addrlo);
1289 addrlo = TCG_TMP2;
1316 ldst->addrlo_reg = addrlo;
1332 base = addrlo;
1452 TCGReg addrlo, TCGReg addrhi,
1459 ldst = prepare_host_addr(s, &h, addrlo, addrhi, oi, true);
[all …]
/openbmc/linux/drivers/net/ethernet/alteon/
H A Dacenic.h164 u32 addrlo; member
715 aa->addrlo = baddr & 0xffffffff; in set_aceaddr()
H A Dacenic.c2327 writel(0, &tx->addr.addrlo); in ace_close()
2388 writel(addr & 0xffffffff, &io->addr.addrlo); in ace_load_tx_bd()
2393 desc->addr.addrlo = addr; in ace_load_tx_bd()
/openbmc/qemu/tcg/arm/
H A Dtcg-target.c.inc1420 .base = addrlo,
1427 .base = addrlo,
1447 ldst->addrlo_reg = addrlo;
1498 t_addr = addrlo;
1502 addrlo, s_mask - a_mask);
1529 ldst->addrlo_reg = addrlo;
1535 tcg_out_dat_imm(s, COND_AL, ARITH_TST, 0, addrlo, a_mask);
1633 TCGReg addrlo, TCGReg addrhi,
1640 ldst = prepare_host_addr(s, &h, addrlo, addrhi, oi, true);
1719 TCGReg addrlo, TCGReg addrhi,
[all …]
/openbmc/linux/drivers/crypto/inside-secure/
H A Dsafexcel.c80 u32 val, addrhi, addrlo, addrmid, addralias, delta, marker; in eip197_trc_cache_probe() local
88 addrlo = 0; in eip197_trc_cache_probe()
90 while ((addrhi - addrlo) > stride) { in eip197_trc_cache_probe()
92 addrmid = (addrhi + addrlo) >> 1; in eip197_trc_cache_probe()
117 addrlo = addrmid; in eip197_trc_cache_probe()
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.c.inc2477 ldst->addrlo_reg = addrlo;
2486 tcg_out_shri32(s, TCG_REG_R0, addrlo,
2489 tcg_out_shri64(s, TCG_REG_R0, addrlo,
2537 tcg_out_rlw(s, RLWINM, TCG_REG_R0, addrlo, 0,
2540 TCGReg t = addrlo;
2604 ldst->addrlo_reg = addrlo;
2620 tcg_out_ext32u(s, TCG_REG_TMP2, addrlo);
2623 h->index = addrlo;
2630 TCGReg addrlo, TCGReg addrhi,
2637 ldst = prepare_host_addr(s, &h, addrlo, addrhi, oi, true);
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_svm.c462 const u32 addrlo = nvif_rd32(memory, offset + 0x08); in nouveau_svm_fault_cache() local
491 fault->addr = (u64)addrhi << 32 | addrlo; in nouveau_svm_fault_cache()
/openbmc/qemu/tcg/i386/
H A Dtcg-target.c.inc2092 TCGReg addrlo, TCGReg addrhi,
2107 h->base = addrlo;
2125 ldst->addrlo_reg = addrlo;
2140 tcg_out_mov(s, tlbtype, TCG_REG_L0, addrlo);
2156 tcg_out_mov(s, ttype, TCG_REG_L1, addrlo);
2159 addrlo, s_mask - a_mask);
2193 ldst->addrlo_reg = addrlo;
2369 TCGReg addrlo, TCGReg addrhi,
2375 ldst = prepare_host_addr(s, &h, addrlo, addrhi, oi, true);
2497 TCGReg addrlo, TCGReg addrhi,
[all …]