Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN (Results 1 – 1 of 1) sorted by relevance
205 #define XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN (1 << 13) macro329 value |= XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN; in pcie_phy_enable()366 value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN; in pcie_phy_enable()