Searched refs:X2APIC_MSR (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/arch/x86/kvm/svm/ |
H A D | svm.c | 81 #define X2APIC_MSR(x) (APIC_BASE_MSR + (x >> 4)) macro 112 { .index = X2APIC_MSR(APIC_ID), .always = false }, 113 { .index = X2APIC_MSR(APIC_LVR), .always = false }, 117 { .index = X2APIC_MSR(APIC_EOI), .always = false }, 118 { .index = X2APIC_MSR(APIC_RRR), .always = false }, 119 { .index = X2APIC_MSR(APIC_LDR), .always = false }, 120 { .index = X2APIC_MSR(APIC_DFR), .always = false }, 122 { .index = X2APIC_MSR(APIC_ISR), .always = false }, 123 { .index = X2APIC_MSR(APIC_TMR), .always = false }, 124 { .index = X2APIC_MSR(APIC_IRR), .always = false }, [all …]
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/openbmc/linux/arch/x86/kvm/vmx/ |
H A D | vmx.h | 23 #define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4)) macro
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H A D | vmx.c | 4092 vmx_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_RW, in vmx_update_msr_bitmap_x2apic() 4096 vmx_enable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TMCCT), MSR_TYPE_RW); in vmx_update_msr_bitmap_x2apic() 4097 vmx_disable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_EOI), MSR_TYPE_W); in vmx_update_msr_bitmap_x2apic() 4098 vmx_disable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_SELF_IPI), MSR_TYPE_W); in vmx_update_msr_bitmap_x2apic() 4100 vmx_disable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_ICR), MSR_TYPE_RW); in vmx_update_msr_bitmap_x2apic()
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H A D | nested.c | 626 X2APIC_MSR(APIC_TASKPRI), in nested_vmx_prepare_msr_bitmap() 632 X2APIC_MSR(APIC_EOI), in nested_vmx_prepare_msr_bitmap() 636 X2APIC_MSR(APIC_SELF_IPI), in nested_vmx_prepare_msr_bitmap()
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