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Searched refs:WD_DEBUG_REG5__p1_send_to_ia1_p3_q_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h16299 #define WD_DEBUG_REG5__p1_send_to_ia1_p3_q_MASK 0x4000000 macro
H A Dgfx_8_0_sh_mask.h18441 #define WD_DEBUG_REG5__p1_send_to_ia1_p3_q_MASK 0x4000000 macro
H A Dgfx_8_1_sh_mask.h19031 #define WD_DEBUG_REG5__p1_send_to_ia1_p3_q_MASK 0x4000000 macro