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Searched refs:VPLL_CON0_VAL (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c91 writel(VPLL_CON0_VAL, &clk->vpll_con0); in system_clock_init()
H A Dexynos4_setup.h381 #define VPLL_CON0_VAL SET_PLL(VPLL_MDIV, VPLL_PDIV, VPLL_SDIV) macro
/openbmc/u-boot/board/samsung/trats/
H A Dtrats.c346 writel(VPLL_CON0_VAL, (unsigned int)&clk->vpll_con0); in board_clock_init()
H A Dsetup.h270 #define VPLL_CON0_VAL SET_PLL(VPLL_MDIV, VPLL_PDIV, VPLL_SDIV) macro