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Searched refs:VGT_DEBUG_REG27__gsc_indx_count_p0_q_MASK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h11694 #define VGT_DEBUG_REG27__gsc_indx_count_p0_q_MASK 0x7ff00000L macro
H A Dgfx_7_2_sh_mask.h17671 #define VGT_DEBUG_REG27__gsc_indx_count_p0_q_MASK 0x7ff00000 macro
H A Dgfx_8_0_sh_mask.h19981 #define VGT_DEBUG_REG27__gsc_indx_count_p0_q_MASK 0x7ff00000 macro
H A Dgfx_8_1_sh_mask.h20583 #define VGT_DEBUG_REG27__gsc_indx_count_p0_q_MASK 0x7ff00000 macro