Searched refs:VC3_MPAR_WL (Results 1 – 1 of 1) sorted by relevance
199 #define VC3_MPAR_WL (VC3_MPAR_RL - 1) macro203 #define VC3_MPAR_OW (VC3_MPAR_WL - 2)204 #define VC3_MPAR_OR (VC3_MPAR_WL - 3)216 #define VC3_MPAR_WL VC3_MPAR_CWL macro228 #define MSCC_MEMPARM_MR2 ((VC3_MPAR_WL - 5) << 3)251 VC3_MPAR_WL) | \255 ICPU_MEMCTRL_TIMING0_WR_TO_PRECH_DLY(VC3_MPAR_WL + \259 ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY(VC3_MPAR_WL - 1) | \268 ICPU_MEMCTRL_TIMING1_WR_TO_RD_DLY(VC3_MPAR_WL + \279 ICPU_MEMCTRL_TIMING3_WR_TO_RD_CS_CHANGE_DLY(VC3_MPAR_WL + \