/openbmc/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_pbs.c | 87 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 100 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 176 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 335 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 350 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 373 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 400 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 461 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 478 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() 627 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs() [all …]
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H A D | ddr3_debug.c | 140 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_reg_dump() 151 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_reg_dump() 526 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_stability_log() 688 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_read_adll_value() 722 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_write_adll_value() 753 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in read_phase_value() 781 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in write_leveling_value() 876 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, j); in print_adll() 892 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, j); in print_ph() 1046 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_run_sweep_test() [all …]
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H A D | ddr3_training_leveling.c | 206 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_read_leveling() 272 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_read_leveling() 420 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_per_bit_read_leveling() 651 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, in ddr3_tip_dynamic_per_bit_read_leveling() 683 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_per_bit_read_leveling() 784 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_calc_cs_mask() 1187 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_dynamic_write_leveling_supp() 1511 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_dynamic_write_leveling_seq() 1553 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_dynamic_read_leveling_seq() 1617 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_wl_supp_result() [all …]
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H A D | ddr3_training_centralization.c | 107 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization() 137 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization() 354 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization() 549 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup_id); in ddr3_tip_special_rx() 710 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_centralization_result()
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H A D | ddr3_training_hw_algo.c | 238 VALIDATE_BUS_ACTIVE in ddr3_tip_vref() 263 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref() 277 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref() 605 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref()
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H A D | mv_ddr_topology.c | 208 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sphy); in mv_ddr_cs_num_get() 252 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, i); in mv_ddr_mem_sz_per_cs_get()
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H A D | ddr3_training_ip_engine.c | 756 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup_cnt); in ddr3_tip_read_training_result() 1164 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper() 1285 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper() 1322 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper() 1352 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper() 1400 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper() 1467 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_load_phy_values() 1558 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, in ddr3_tip_training_ip_test()
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H A D | ddr3_training.c | 191 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sphy); in ddr3_tip_pad_inv() 371 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_index); in hws_ddr3_tip_init_controller() 480 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in hws_ddr3_tip_init_controller() 683 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_rev2_rank_control() 737 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_rev3_rank_control() 1145 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in adll_calibration() 1291 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_index); in ddr3_tip_freq_set() 1435 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_freq_set() 1774 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_write_cs_result() 1884 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, phy_id); in ddr3_tip_ddr3_reset_phy_regs() [all …]
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H A D | ddr3_training_bist.c | 574 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get() 588 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get() 596 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
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H A D | mv_ddr_topology.h | 279 #define VALIDATE_BUS_ACTIVE(mask, id) \ macro
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H A D | mv_ddr_plat.c | 623 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, i); in prfa_read() 1418 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, phy_id); in ddr3_tip_configure_phy()
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