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Searched refs:UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_INTRESET__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9284 #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_INTRESET__SHIFT 0x0000001d macro
H A Ddce_8_0_sh_mask.h4500 #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_INTRESET__SHIFT 0x1d macro
H A Ddce_10_0_sh_mask.h12056 #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_INTRESET__SHIFT 0x1d macro
H A Ddce_11_0_sh_mask.h11868 #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_INTRESET__SHIFT 0x1d macro