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Searched refs:TPC0_QM_GLBL_ERR_ADDR_HI_VAL_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc0_qm_masks.h100 #define TPC0_QM_GLBL_ERR_ADDR_HI_VAL_MASK 0xFFFFFFFF macro
/openbmc/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc0_qm_masks.h790 #define TPC0_QM_GLBL_ERR_ADDR_HI_VAL_MASK 0xFFFFFFFF macro