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Searched refs:TM_WORD0 (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/tests/qtest/
H A Dpnv-xive2-test.c114 set_tima32(qts, i, TM_QW2_HV_POOL + TM_WORD0, 0x000000ff); in reset_pool_threads()
137 set_tima32(qts, i, TM_QW3_HV_PHYS + TM_WORD0, 0x00ff00ff); in reset_hw_threads()
236 reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0); in test_hw_irq()
260 reg32 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0); in test_hw_irq()
288 qw1w0 = get_tima32(qts, target_pir, TM_QW1_OS + TM_WORD0); in test_pull_thread_ctx_to_odd_thread_cl()
289 qw3w0 = get_tima32(qts, target_pir, TM_QW3_HV_PHYS + TM_WORD0); in test_pull_thread_ctx_to_odd_thread_cl()
299 memcpy(&cl_word, &cl_pair[XIVE_ODD_CL + TM_QW1_OS + TM_WORD0], 4); in test_pull_thread_ctx_to_odd_thread_cl()
301 memcpy(&cl_word, &cl_pair[XIVE_ODD_CL + TM_QW3_HV_PHYS + TM_WORD0], 4); in test_pull_thread_ctx_to_odd_thread_cl()
/openbmc/linux/arch/powerpc/include/asm/
H A Dxive-regs.h72 #define TM_WORD0 0x0 macro
/openbmc/qemu/include/hw/ppc/
H A Dxive_regs.h86 #define TM_WORD0 0x0 macro
/openbmc/linux/arch/powerpc/sysdev/xive/
H A Dspapr.c650 in_be32(xive_tima + TM_QW1_OS + TM_WORD0), in xive_spapr_setup_cpu()
H A Dnative.c427 out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD0, 0xff); in xive_native_setup_cpu()