Searched refs:TMR0 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/sh/kernel/cpu/sh2a/ |
| H A D | setup-sh7201.c | 44 TMR0, TMR1, enumerator
139 INTC_IRQ(TMR0, 246), INTC_IRQ(TMR0, 247),
140 INTC_IRQ(TMR0, 248),
166 { 0xfffe9814, 0, 16, 4, /* IPR16 */ { SSI0_SSII, SSI1_SSII, TMR0, TMR1 } },
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| /openbmc/qemu/docs/system/ |
| H A D | target-rx.rst | 13 - 8Bit Timer x 1CH (TMR0,1)
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