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Searched refs:TEGRA20_CLK_PLL_D_OUT0 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dtegra20-car.h140 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dtegra20-car.h139 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/openbmc/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-host1x.yaml338 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
362 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
/openbmc/u-boot/doc/device-tree-bindings/gpu/
H A Dnvidia,tegra20-host1x.txt344 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
363 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra20.c432 { .con_id = "pll_d_out0", .dt_id = TEGRA20_CLK_PLL_D_OUT0 },
675 clks[TEGRA20_CLK_PLL_D_OUT0] = clk; in tegra20_pll_init()
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20.dtsi186 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
210 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20.dtsi118 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;