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Searched refs:SS_MMU_INDEX (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvzicfiss.c.inc30 tcg_gen_qemu_ld_tl(data, addr, SS_MMU_INDEX(ctx),
57 tcg_gen_qemu_st_tl(data, addr, SS_MMU_INDEX(ctx),
90 tcg_gen_atomic_xchg_tl(dest, src1, src2, SS_MMU_INDEX(ctx),
110 tcg_gen_atomic_xchg_tl(dest, src1, src2, SS_MMU_INDEX(ctx),
/openbmc/qemu/target/riscv/
H A Dtranslate.c1132 #define SS_MMU_INDEX(ctx) (ctx->mem_idx | MMU_IDX_SS_WRITE) macro