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Searched refs:SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9350 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK 0x0000f000L macro
H A Dgfx_7_2_sh_mask.h11927 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK 0xf000 macro
H A Dgfx_8_0_sh_mask.h13773 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK 0xf000 macro
H A Dgfx_8_1_sh_mask.h14171 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK 0xf000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21717 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK … macro
H A Dgc_9_2_1_sh_mask.h22995 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK … macro
H A Dgc_9_1_sh_mask.h23028 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK … macro
H A Dgc_9_4_3_sh_mask.h25190 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK … macro
H A Dgc_9_4_2_sh_mask.h16810 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK … macro
H A Dgc_10_1_0_sh_mask.h31644 #define SQ_PERFCOUNTER5_SELECT__SQC_BANK_MASK_MASK … macro