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Searched refs:SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h8878 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK 0x0000000fL macro
H A Dgfx_7_2_sh_mask.h11749 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK 0xf macro
H A Dgfx_8_0_sh_mask.h13551 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK 0xf macro
H A Dgfx_8_1_sh_mask.h13949 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK 0xf macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2162 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h2033 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h2010 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro
H A Dgc_9_4_3_sh_mask.h2171 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro
H A Dgc_9_4_2_sh_mask.h25454 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro
H A Dgc_11_0_0_sh_mask.h7035 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro
H A Dgc_11_0_3_sh_mask.h7892 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro
H A Dgc_10_1_0_sh_mask.h7712 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro
H A Dgc_10_3_0_sh_mask.h8047 #define SQ_FIFO_SIZES__INTERRUPT_FIFO_SIZE_MASK … macro