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Searched refs:SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h4178 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro
H A Dgc_9_2_1_sh_mask.h3574 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro
H A Dgc_9_1_sh_mask.h3710 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro
H A Dgc_9_4_3_sh_mask.h4419 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro
H A Dgc_9_4_2_sh_mask.h24517 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro
H A Dgc_11_0_0_sh_mask.h7286 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro
H A Dgc_11_0_3_sh_mask.h8777 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro
H A Dgc_10_1_0_sh_mask.h8453 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro
H A Dgc_10_3_0_sh_mask.h8772 #define SPI_DSM_CNTL__SPI_SR_MEM_ENABLE_SINGLE_WRITE_MASK macro