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Searched refs:SET_SDHC_MUX_SEL (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/freescale/ls2080aqds/
H A Dls2080aqds.c32 #define SET_SDHC_MUX_SEL(reg, value) ((reg & 0xf0) | value) macro
181 reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_SDHC); in config_board_mux()
184 reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_DSPI); in config_board_mux()
/openbmc/u-boot/board/freescale/ls1021aqds/
H A Dls1021aqds.c37 #define SET_SDHC_MUX_SEL(reg, value) ((reg & 0x0f) | value) macro
290 reg14 = SET_SDHC_MUX_SEL(reg14, PIN_MUX_SEL_IIC2); in config_board_mux()
300 reg14 = SET_SDHC_MUX_SEL(reg14, PIN_MUX_SEL_SDHC); in config_board_mux()
/openbmc/u-boot/board/freescale/ls2080ardb/
H A Dls2080ardb.c34 #define SET_SDHC_MUX_SEL(reg, value) ((reg & 0xf0) | value) macro
189 reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_SDHC); in config_board_mux()
192 reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_DSPI); in config_board_mux()