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Searched refs:SCL_C_RAM_PHASE_1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h3311 SCL_C_RAM_PHASE_1 = 0x1, enumerator
H A Ddce_11_2_enum.h3794 SCL_C_RAM_PHASE_1 = 0x1, enumerator
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h6439 SCL_C_RAM_PHASE_1 = 0x00000001, enumerator