Searched refs:RXTX_REG0_CTLE_EQ_HR_SET (Results 1 – 1 of 1) sorted by relevance
270 #define RXTX_REG0_CTLE_EQ_HR_SET(dst, src) \ macro951 val = RXTX_REG0_CTLE_EQ_HR_SET(val, 0x10); in xgene_phy_sata_cfg_lanes()