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Searched refs:RPLL_CON2_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dexynos5_setup.h467 #define RPLL_CON2_VAL NOT_AVAILABLE macro
734 #define RPLL_CON2_VAL 0x00000080 macro
H A Dclock_init_exynos5.c904 writel(RPLL_CON2_VAL, &clk->rpll_con2); in exynos5420_system_clock_init()