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Searched refs:RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8132 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT 0x14 macro
H A Dgfx_8_0_sh_mask.h9044 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT 0x14 macro
H A Dgfx_8_1_sh_mask.h9584 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT 0x14 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19827 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h21065 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h21138 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h23193 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h13271 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h27184 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h29705 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h27803 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h26082 #define RLC_GPM_PERF_COUNT_1__ENABLE__SHIFT … macro