Searched refs:RK3328_PRE_PLL_PCLK_DIV_B (Results 1 – 1 of 1) sorted by relevance
158 #define RK3328_PRE_PLL_PCLK_DIV_B(x) UPDATE(x, 6, 5) macro961 RK3328_PRE_PLL_PCLK_DIV_B(cfg->pclk_div_b)); in inno_hdmi_phy_rk3328_clk_set_rate()