Searched refs:RISC_MTREG_P0DFLT (Results 1 – 2 of 2) sorted by relevance
481 #define RISC_MTREG_P0DFLT 0x0012 /* Default read/write timing, pg0 */ macro
368 sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT), in qlogicpti_reset_hardware()542 sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT), in qlogicpti_load_firmware()