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Searched refs:RISCV_U_MACHINE (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/include/hw/riscv/
H A Dsifive_u.h62 #define RISCV_U_MACHINE(obj) \ macro
/openbmc/qemu/hw/riscv/
H A Dsifive_u.c515 SiFiveUState *s = RISCV_U_MACHINE(machine); in sifive_u_machine_init()
683 SiFiveUState *s = RISCV_U_MACHINE(obj); in sifive_u_machine_get_start_in_flash()
690 SiFiveUState *s = RISCV_U_MACHINE(obj); in sifive_u_machine_set_start_in_flash()
697 SiFiveUState *s = RISCV_U_MACHINE(obj); in sifive_u_machine_instance_init()