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Searched refs:RISCV_IOMMU_MSI_MRIF_NPPN (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h418 #define RISCV_IOMMU_MSI_MRIF_NPPN RISCV_IOMMU_PPN_FIELD macro
H A Driscv-iommu.c660 addr = PPN_PHYS(get_field(pte[1], RISCV_IOMMU_MSI_MRIF_NPPN)); in riscv_iommu_msi_write()