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Searched refs:RISCV_IOMMU_ICVEC_CIV (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h206 #define RISCV_IOMMU_ICVEC_CIV GENMASK_ULL(3, 0) macro
H A Driscv-iommu.c83 return icvec & RISCV_IOMMU_ICVEC_CIV; in riscv_iommu_get_icvec_vector()
1834 icvec |= MIN(data & RISCV_IOMMU_ICVEC_CIV, in riscv_iommu_update_icvec()
1835 s->icvec_avail_vectors & RISCV_IOMMU_ICVEC_CIV); in riscv_iommu_update_icvec()