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Searched refs:RISCV_IOMMU_FCTL_GXL (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h95 #define RISCV_IOMMU_FCTL_GXL BIT(2) macro
H A Driscv-iommu.c314 if (pass ? (s->fctl & RISCV_IOMMU_FCTL_GXL) : in riscv_iommu_spa_fetch()