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Searched refs:RISCV_IOMMU_DDTP_MODE_BARE (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h105 RISCV_IOMMU_DDTP_MODE_BARE = 1, enumerator
H A Driscv-iommu.c873 case RISCV_IOMMU_DDTP_MODE_BARE: in riscv_iommu_ctx_fetch()
1514 new_mode == RISCV_IOMMU_DDTP_MODE_BARE) { in riscv_iommu_process_ddtp()
1520 old_mode == RISCV_IOMMU_DDTP_MODE_BARE; in riscv_iommu_process_ddtp()
2148 RISCV_IOMMU_DDTP_MODE_OFF : RISCV_IOMMU_DDTP_MODE_BARE); in riscv_iommu_realize()