Home
last modified time | relevance | path

Searched refs:RISCV_IOMMU_DC_FSC_MODE_BARE (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h310 RISCV_IOMMU_DC_FSC_MODE_BARE = 0, enumerator
H A Driscv-iommu.c278 en_s = satp != RISCV_IOMMU_DC_FSC_MODE_BARE; in riscv_iommu_spa_fetch()
812 case RISCV_IOMMU_DC_FSC_MODE_BARE: in riscv_iommu_validate_process_ctx()
878 RISCV_IOMMU_DC_FSC_MODE_BARE); in riscv_iommu_ctx_fetch()
999 if (mode == RISCV_IOMMU_DC_FSC_MODE_BARE) { in riscv_iommu_ctx_fetch()