Home
last modified time | relevance | path

Searched refs:RISCV_IOMMU_CAP_SV39 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h73 #define RISCV_IOMMU_CAP_SV39 BIT_ULL(9) macro
H A Driscv-iommu.c344 sv_mode = pass ? RISCV_IOMMU_CAP_SV39X4 : RISCV_IOMMU_CAP_SV39; in riscv_iommu_spa_fetch()
763 if (!(s->cap & RISCV_IOMMU_CAP_SV39)) { in riscv_iommu_validate_device_ctx()
830 if (!(s->cap & RISCV_IOMMU_CAP_SV39)) { in riscv_iommu_validate_process_ctx()
2128 s->cap |= RISCV_IOMMU_CAP_SV32 | RISCV_IOMMU_CAP_SV39 | in riscv_iommu_realize()