Searched refs:REG_PTR (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/arch/riscv/kernel/ |
| H A D | traps_misaligned.c | 132 #define REG_PTR(insn, pos, regs) \ macro
135 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs))
136 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
137 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
138 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
139 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
140 #define GET_SP(regs) (*REG_PTR(2, 0, regs))
141 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
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| /openbmc/linux/arch/riscv/kvm/ |
| H A D | vcpu_insn.c | 118 #define REG_PTR(insn, pos, regs) \ macro
123 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs))
124 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
125 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
126 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
127 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
128 #define GET_SP(regs) (*REG_PTR(2, 0, regs))
129 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
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| /openbmc/qemu/hw/isa/ |
| H A D | pc87312.c | 38 #define REG_PTR 2 macro
88 return (s->regs[REG_PTR] & PTR_IRQ_5_7) ? 7 : 5; in get_parallel_irq()
182 s->regs[REG_FER], s->regs[REG_FAR], s->regs[REG_PTR]); in reconfigure_devices()
211 s->regs[REG_PTR] = ptr_init[s->config & 0x1f]; in pc87312_soft_reset()
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| /openbmc/linux/arch/alpha/kernel/ |
| H A D | pc873xx.h | 11 #define REG_PTR 0x02 macro
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