Searched refs:REG_MSU_MSC0CTL (Results 1 – 2 of 2) sorted by relevance
15 REG_MSU_MSC0CTL = 0x0100, /* MSC0 control */ enumerator
786 reg = ioread32(msc->reg_base + REG_MSU_MSC0CTL); in msc_configure()796 iowrite32(reg, msc->reg_base + REG_MSU_MSC0CTL); in msc_configure()842 reg = ioread32(msc->reg_base + REG_MSU_MSC0CTL); in msc_disable()844 iowrite32(reg, msc->reg_base + REG_MSU_MSC0CTL); in msc_disable()1702 (ioread32(msc->reg_base + REG_MSU_MSC0CTL) & MSC_LEN) >> in intel_th_msc_init()