Searched refs:REG_IRQ1_EN0 (Results 1 – 1 of 1) sorted by relevance
95 #define REG_IRQ1_EN0 0x3C7 /* RW Interrupt Mask set bits for IRQ1 */ macro1118 adf7242_write_reg(lp, REG_IRQ1_EN0, 0); in adf7242_hw_init()