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Searched refs:REG_DUNIT_CTRL_LOW_ADDR (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_write_leveling.c75 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR); in ddr3_write_leveling_hw()
78 reg_write(REG_DUNIT_CTRL_LOW_ADDR, in ddr3_write_leveling_hw()
162 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR) | in ddr3_write_leveling_hw()
164 reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg); in ddr3_write_leveling_hw()
498 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR); in ddr3_write_leveling_hw_reg_dimm()
501 reg_write(REG_DUNIT_CTRL_LOW_ADDR, in ddr3_write_leveling_hw_reg_dimm()
669 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR); in ddr3_write_leveling_sw()
672 reg_write(REG_DUNIT_CTRL_LOW_ADDR, in ddr3_write_leveling_sw()
864 reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg); in ddr3_write_leveling_sw()
893 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR); in ddr3_write_leveling_sw_reg_dimm()
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H A Dddr3_dfs.c354 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR); in ddr3_dfs_high_2_low()
358 dfs_reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg); in ddr3_dfs_high_2_low()
654 reg = (reg_read(REG_DUNIT_CTRL_LOW_ADDR) & 0xFFFFFFE7); in ddr3_dfs_high_2_low()
655 dfs_reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg); in ddr3_dfs_high_2_low()
968 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR); in ddr3_dfs_low_2_high()
974 dfs_reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg); in ddr3_dfs_low_2_high()
1424 reg = (reg_read(REG_DUNIT_CTRL_LOW_ADDR) & 0xFFFFFFE7) | 0x2; in ddr3_dfs_low_2_high()
1431 dfs_reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg); in ddr3_dfs_low_2_high()
H A Dddr3_axp.h91 #define REG_DUNIT_CTRL_LOW_ADDR 0x1404 macro
H A Dddr3_init.c85 debug_print_reg(REG_DUNIT_CTRL_LOW_ADDR); in print_dunit_setup()
H A Dddr3_hw_training.c123 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR); in ddr3_hw_training()
H A Dddr3_spd.c783 reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);
/openbmc/u-boot/arch/arm/mach-mvebu/
H A Ddram.c244 int val = reg_read(REG_DUNIT_CTRL_LOW_ADDR); in cycle_mode()