Searched refs:REG_DSI_28nm_8960_PHY_PLL_CTRL_8 (Results 1 – 2 of 2) sorted by relevance
126 val = dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_pll_28nm_clk_set_rate()128 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, in dsi_pll_28nm_clk_set_rate()202 val = dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_pll_28nm_vco_prepare()205 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, val); in dsi_pll_28nm_vco_prepare()354 dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_28nm_pll_save_state()378 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, in dsi_28nm_pll_restore_state()
256 #define REG_DSI_28nm_8960_PHY_PLL_CTRL_8 0x00000020 macro