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Searched refs:REG_CON1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-pll.c21 #define REG_CON1 4 macro
301 pll->pcw_chg_addr = pll->base_addr + REG_CON1; in mtk_clk_register_pll_ops()
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mtk.c18 #define REG_CON1 4 macro