Searched refs:RCC_PLL1DIVR_DIVN1_MASK (Results 1 – 1 of 1) sorted by relevance
47 #define RCC_PLL1DIVR_DIVN1_MASK GENMASK(8, 0) macro530 divn1 = (readl(®s->pll1divr) & RCC_PLL1DIVR_DIVN1_MASK) + 1; in stm32_get_PLL1_rate()