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Searched refs:R9A07G044_MIPI_DSI_PLLCLK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dr9a07g044-cpg.h87 #define R9A07G044_MIPI_DSI_PLLCLK 51 macro
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dsi.yaml150 clocks = <&cpg CPG_MOD R9A07G044_MIPI_DSI_PLLCLK>,
/openbmc/linux/drivers/clk/renesas/
H A Dr9a07g044-cpg.c261 DEF_MOD("dsi_pll_clk", R9A07G044_MIPI_DSI_PLLCLK, R9A07G044_CLK_M1,
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g044.dtsi783 clocks = <&cpg CPG_MOD R9A07G044_MIPI_DSI_PLLCLK>,