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Searched refs:R8A77965_CLK_SD0H (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h40 #define R8A77965_CLK_SD0H 29 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h40 #define R8A77965_CLK_SD0H 29 macro
/openbmc/linux/drivers/clk/renesas/
H A Dr8a77965-cpg-mssr.c101 DEF_GEN3_SDH("sd0h", R8A77965_CLK_SD0H, CLK_SDSRC, 0x074),
105 DEF_GEN3_SD("sd0", R8A77965_CLK_SD0, R8A77965_CLK_SD0H, 0x074),
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77965.dtsi2319 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>;